DOI: 10.7763/IJCEE.2012.V4.615
Design and Implemention of ADC Implanted in 10 000 Frame/s High-Speed CMOS Sensor
Abstract—This paper describes the design of pipeline ADC embedded in a high speed CMOS sensor that has been designed and fabricated by Paindavoine. The idea of ADC to be embedded in the high speed cmos sensor in order to reduce power, integrated so that the output of the CMOS sensor is already in digital form. An ADC is designed using Pipeline topology with considerations is simple in the design because it just makes a stage and the next stage is duplicated, relatively high speed and have good resolution. Pipeline ADC designed using 0.35 μm CMOS technology. Pipeline ADC successfully implemented in a electronics circuit and layout. It has been fabricated. The results of simulations show that the design of pipeline ADC is working properly and can be used to handle a high speed CMOS sensor that has speed of 10 000 frames/s.
Index Terms—ADC, CMOS, high speed, pipeline. frame
Eri Prasetyo Wibowo is with Gunadarma University, Jakarta Indonesia(e-mail: eri@staff.gunadarma.ac.id)
Hamzah Affandi and Boesono Soerowirdjo are with the Electrical engineering Dept. of Gunadarma University, Jakarta Indonesia (e-mail:hamzah@staff.gunadarma.ac.id, busono@staff.gunadarma.ac.id)
Brahmantyo Heruseto is with Computer System Dept. of Gunadarma University, Jakarta Indonesia (e-mail: brahm@staff.gunadarma.ac.id)
Michel Paindavoine is with Burgundy University, France.Purnawarman Musa is with Burgundy University France and Gunadarma University, Jakarta Indonesia (e-mail: p_musa@staff.gunadarma.ac.id)
Cite: Eri Prasetyo Wibowo, Hamzah Affandi, Boesono Soerowirdjo, B. Heruseto, Purnawarman Musa, andMichel Paindavoine, "Design and Implemention of ADC Implanted in 10 000 Frame/s High-Speed CMOS Sensor," International Journal of Computer and Electrical Engineering vol. 4, no. 6, pp. 839-842, 2012.
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