Abstract—Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power CMOS design, digital signal processing and nanotechnology. This paper presents the efficient design approaches of fault tolerant carry skip adders (FTCSAs) and compares those designs with the existing ones. Variable block carry skip logic (VBCSL) using the fault tolerant full adders (FTFAs) has also been developed. The designs are minimized in terms of hardware complexity, gate count, constant inputs and garbage outputs. Besides of it, technology independent evaluation of the proposed designs clearly demonstrates its superiority with the existing counterparts.

Index Terms—Reversible Logic, Parity Preserving Reversible Gate, FTFA, Carry Skip Adder, VBCSL.

Md. Saiful Islam is with the Institute of Information Technology, University of Dhaka, Dhaka-1000, Bangladesh. (phone: +8801911489986;e-mail: saiful@iit.du.ac.bd).
Muhammad Mahbubur Rahman is with the Dept. of Computer Science and Engineering, American International University-Bangladesh,Dhaka-1213, Bangladesh. (e-mail: mus_mahbub@hotmail.com).
Zerina Begum is with the Institute of Information Technology, University of Dhaka, Dhaka-1000, Bangladesh. (e-mail: zerin@univdhaka.edu).
Mohd. Zulfiquar Hafiz is with the Institute of Information Technology, University of Dhaka, Dhaka-1000, Bangladesh. (e-mail:jewel@univdhaka.edu).

Cite: Md. Saiful Islam, M. M. Rahman, Zerina Begum and M. Z. Hafiz, "Fault Tolerant Variable Block Carry Skip Logic (VBCSL) Using Parity Preserving Reversible Gates," International Journal of Computer and Electrical Engineering vol. 3, no. 1, pp. 1-7, 2011.